251059 EP丨Design of a Timing-Controlled Non-Volatile Flip-Flop with Low- Switching-Ratio FeFET

Authors: Du Shimin*, Yang Chang, Wang Lunyao, Zhang ZheAuthor: College of Science & Technology, Ningbo UniversityCorresponding author: Du Shimin, dushimin@nbu.edu.cnOpen source date: May 14th, 2026 Fund projects: National Natural Science Foundation of China (U23A20351, 62304115); Natural Science Foundation of Zhejiang Province (LDT23F04021F04, LDT23F04021), Open Project of Ningbo Key Laboratory of Intelligent Home Appliances(20250621) Open source content Design of a Timing-Controlled Non-Volatile Flip-Flop with Low- Switching-Ratio FeFET Abstract:   Nonvolatile flip-flops (NVFFs) based on ferroelectric field-effect transistors (FeFETs) offer efficient, high-speed data backup and restoration, making them a promising approach for enhancing the performance of nonvolatile processors (NVPs).

However, studies have shown that when the FeFET on/off ratio degrades, conventional single-ended flip-flops become susceptible to contention among the MOSFETs inside the latch during power-off recovery. This contention can alter the stored state of the FeFET, leading to data restoration failures. To address this issue, this paper proposes a single-ended recovery circuit tailored for the static single-phase contention-free flip-flop (SSCFF).